Embodiments of the inventive concept disclosed herein relate to a semiconductor memory device, semiconductor memory device operations, a memory system including the same, and a refresh method thereof.
The capacity and speed of a semiconductor memory device used in various electronic systems is increasing in response to the demand of high performance from users. With respect to volatile memory devices, such as dynamic random access memory (DRAM), data is stored in the form of charges stored in a memory cell capacitor. Since charges stored in the memory cell capacitor leak as time goes on, the DRAM has a finite data retention characteristic.
To address this finite data retention characteristic, DRAM performs a refresh operation to retain data stored in the memory cell capacitor. A memory controller, such as a DRAM controller, that accesses the DRAM may manage and control the DRAM, for example, by allowing the DRAM to perform its refresh operations at a timing determined by the DRAM or by providing refresh instructions at timing determined by the DRAM controller. The DRAM may refresh its memory cells at a given period depending on a refresh command provided from the host. However, system complexity of the host may increase in order to control the refresh operation. The DRAM may also include components such as a command decoder, a timer, and the like for the purpose of decoding an external command and performing the refresh operation.
In some systems, data is read from and written to the DRAM at a preset time based on a given scenario or particular use. Thus, such accesses to the DRAM may not be typical random accesses. For example, in the case where the DRAM is used as a frame buffer that temporarily stores image data, an image processing processor accesses the DRAM regularly based on a particular scenario, not randomly.
When accessing the DRAM based on a particular scenario, the DRAM may perform a refresh operation when possible without an additional external refresh command. In the case of the DRAM that is accessed based on the scenario, the efficiency of the refresh operation may be improved, thereby making it possible to implement simplification and low power of a system.